Sun 17 - Fri 22 October 2021 Chicago, Illinois, United States
Yann Herklotz

Registered user since Wed 12 Jun 2019

Name:Yann Herklotz

My research focuses on formalising the process of converting high-level programming language descriptions to correct hardware that is functionally equivalent to the input. This process is called high-level synthesis (HLS), and allows software to be turned into custom accelerators automatically, which can then be placed on field-programmable gate arrays (FPGAs). An implementation in the Coq theorem prover called Vericert can be found on Github.

Country:United Kingdom
Affiliation:Imperial College London
Personal website:https://yannherklotz.com
Research interests:Theorem Proving, High-Level Synthesis, Hardware


SPLASH 2021 Formal Verification of High-Level Synthesis
Formal Verification of High-Level Synthesis
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